Test response compaction method with improved detection and diagnostic abilities

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dc.contributor.authorNovák Ondřejcs
dc.contributor.authorPlíva, Zdeněkcs
dc.date.accessioned2018-09-25T12:12:20Z
dc.date.available2018-09-25T12:12:20Z
dc.date.issued2017cs
dc.description.abstractThis paper describes a test response compaction method that preserves diagnostic information and enables performing a test-per-clock offline test. The test response compaction system is based on a chain of T flip-flops. The T flip-flop signature chain can preserve the information about the positions of the erroneous test response occurrence and the information about the clock cycle when the erroneous test responses occurred. This information can be used for diagnostic purposes. An algorithm that localizes errors according to the T flip-flop chain output is presented. The paper discusses the possible benefits and limitations of the proposed test pattern compaction scheme. The influence of multiple errors on detection and localization capability of the compaction system and hardware overhead is discussed in the paper as well. The probability of error masking is analyzed, the proposed scheme provides substantially lower masking probability than a D flip-flop chain and a MISR. The scheme can spare the test time by the test-per-clock arrangement. The hardware overhead and reached test time are given for several benchmark circuits in the paper as well.en
dc.format.extent6cs
dc.identifier.WebofScienceResearcherIDB-7866-2010 Plíva, Zdeněk
dc.identifier.doi10.1109/DDECS.2017.7934586
dc.identifier.isbn978-153860471-7cs
dc.identifier.issn2334-3133cs
dc.identifier.orcid0000-0003-1443-0960 Plíva Zdeněk
dc.identifier.urihttps://dspace.tul.cz/handle/15240/30938
dc.identifier.urihttps://www.sciencedirect.com/science/article/pii/S0026271417304924
dc.language.isoengcs
dc.relation.ispartofseries1cs
dc.relation.urihttp://ieeexplore.ieee.org/document/7934586/cs
dc.subjectDesign for testability (DFT)cs
dc.subjectScan-based testcs
dc.subjectLinear finite state machinescs
dc.titleTest response compaction method with improved detection and diagnostic abilitiesen
dc.titleLogic Testing with Test-per-Clock Pattern Loading and Improved Diagnostic Abilitiescs
local.citation.epage54-59cs
local.citation.spage54-59cs
local.identifier.publikace4391
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