Measuring and Identifying Aging-Critical Paths in FPGAs
dc.contributor.author | Ubar Raimund | cs |
dc.contributor.author | Jenihhin Maksim | cs |
dc.contributor.author | Raik Jaan | cs |
dc.contributor.author | Plíva Zdeněk | cs |
dc.contributor.author | Pfeifer Petr | cs |
dc.date.accessioned | 2018-09-25T12:06:23Z | |
dc.date.available | 2018-09-25T12:06:23Z | |
dc.date.issued | 2015 | cs |
dc.format.extent | 6 | cs |
dc.identifier.doi | 10.13140/RG.2.1.3147.4729 | |
dc.identifier.uri | https://dspace.tul.cz/handle/15240/30033 | |
dc.language.iso | eng | cs |
dc.publisher | COST MEDIAN | cs |
dc.publisher.city | Grenoble | cs |
dc.relation.ispartofseries | 1 | cs |
dc.relation.uri | http://www.median-project.eu/events/median2015 | cs |
dc.subject | Aging | cs |
dc.subject | FPGA | cs |
dc.subject | critical path | cs |
dc.subject | logic | cs |
dc.subject | LUT | cs |
dc.subject | BRAM | cs |
dc.title | Measuring and Identifying Aging-Critical Paths in FPGAs | cs |
local.citation.epage | 56-61 | cs |
local.citation.spage | 56-61 | cs |
local.identifier.publikace | 3466 |