Measuring and Identifying Aging-Critical Paths in FPGAs

Date
2015-01-01
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COST MEDIAN
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Subject(s)
Aging, FPGA, critical path, logic, LUT, BRAM
Citation
Item identifier
https://dspace.tul.cz/handle/15240/30033
 https://doi.org/10.13140/RG.2.1.3147.4729
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